Springer published a monograph “Logic Synthesis for VLSI-Based Combined Finite State Machines. Synthesis Targeting ASICs, CPLDs and FPGAs”, the author’s group of which includes professor of the V.V. Popovskyy Department of Infocommunication Engineering Ph.D Titarenko L.O.. The monograph is part of the book series Lecture Notes in Electrical Engineering (LNEE, volume 922) and contains the following eight sections:

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). Control Algorithms and Finite State Machines. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_1

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). VLSI-based Logic Synthesis. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_2

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). ASIC-based Synthesis of CFSMs. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_3

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). Optimization of ASIC-based CFSMs . In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_4

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). Homogenous CPLD-Based Synthesis of CFSMs . In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_5

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). Heterogeneous CPLD-based Synthesis of CFSMs. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_6

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). CPLD-Based Synthesis with Transformation of State Codes. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_7

Barkalov, A., Titarenko, L., Mielcarek, K., Mazurkiewicz, M., Kawecka, E. (2022). FPGA-Based Synthesis of CFSMs. In: Logic Synthesis for VLSI-Based Combined Finite State Machines. Lecture Notes in Electrical Engineering, vol 922. Springer, Cham. https://doi.org/10.1007/978-3-031-16027-1_8

The book is devoted to the design and optimization of control units represented by combinatorial finite state machines (FSM). To optimize CFSM circuits it is proposed to use optimization methods directed to both Mealy’s and Moore’s FSMs. The book contains some original synthesis and optimization methods aimed at hardware reduction in VLSI-based FSM circuits. These methods take into account the peculiarities of both the FSM model and the ULSI chip used. Optimization is achieved by combining classical optimization methods with the new methods proposed in this book. These new methods are a mixed coding of collections of microoperations and dual state assignment in the VLSI. All proposed methods are focused on reducing the number of arguments in systems of Boolean functions representing circuits of FSM. It is also proposed to use classes of pseudo-equivalent states of Moore automata to reduce the number of terms in these systems. The book contains many examples, which contributes to a better understanding of the considered features of the synthesis methods.

Congratulations to the authors of the monograph, especially Prof. Barkalov, A. A. and Titarenko L.O. for the publication of the new scientific results obtained in a weighty professional publication!